Technical report · Web edition

Synapse-191

Building a Brainfuck
Computing Environment

From a native Brainfuck computer to a typed compiler backend.

Joren Heit · 2025 · Web edition

PC 0x0042DP 0x001FIR 0x2BACC 0x00FLG 0x00

Complete overview

Contents

Browse the complete web edition, from the Synapse-191 hardware through the Acus compiler backend, reflection, appendices, and references.

The Brainfuck Computer

The Brainfuck Computer

01

Introduction

The Brainfuck (BF) programming language is an esoteric programming language that is essentially impossible—or at least highly impractical—to actually write useful programs in. Even if you became a very skilled programmer in…

8 min read
Chapter outline
02

Synapse-191 Architecture

A true BISC implementation is a direct representation of the abstract BF machine described in Section Brainfuck , consisting of an array of memory-cells together with a pointer pointing to one of these cells. The pointer can…

17 min read
Chapter outline
06

Runtime Results

In this chapter we show snapshots of the output during the execution of each of the BF programs listed in Appendix BF Test Suite . Each of these programs was able to run successfully at the maximum clock speed of around 250…

6 min read
Chapter outline

Brainfuck Compilation

Brainfuck Compilation

04

Memory Management

Whenever a variable is declared in Acus, the allocator will look for available space in the current stack-frame. From the allocator’s point of view, named locals, compiler temporaries and cache slots are all typed slots inside…

3 min read
Chapter outline
06

Caching

Slot proxies (Section Slot Proxies and Materialization ) allow expressions to remain abstract until their value is needed. However, repeatedly materializing the same proxy can duplicate work. For example, accessing the same…

6 min read
Chapter outline

Reflection

Reflection

Reflection

Reflection

This project set out as a “What if?” for which expectations were deliberately kept low. A functional system was the goal; not a fast one. We had no idea what kinds of speeds we could expect, how stable the system would be and…

8 min read
Chapter outline

Gallery

Gallery

Gallery

Gallery

Figure 57. Wire stripping can quickly lead to a mess.

1 min read

Appendix

Appendix

A

Microcode Table

Table 15. Control signals for each of the BF instructions. Instr K V A S Z Cycle Control Signals Any except 0 LD(FBI) “ . ”, “ , ” and “ ? ” + 0 0 1 INC(D) SETV(CU) LD(FA) 0 0 2 INC(IP) CLR(CC) 1 0 1 LD(D) OE(RAM) 1 0 2 INC(D)…

4 min read
B

Mugen Specification

# This file can be compiled with Mugen, see https://github.com/jorenheit/mugen. [rom] { 8192 x 8 x 3 } [address] { cycle: 3 opcode: 4 flags: K, V, A, S, Z } [signals] { HLT RS0 RS1 RS2 INC DEC CLR_DP EN_SP OE_RAM WE_RAM EN_IN…

6 min read
E

IO Module ISR

Listing 16. ISRs that implement the state machine of the IO module.

1 min read
F

Constant Factory Lookup Table

Table 18 lists the factor pair selected for each constant ( c ) from 0 through 128. The generated code first constructs the product ( a b ), then corrects for any remaining difference ( c − a b ) using increment or decrement…

2 min read
G

Schematics

This appendix contains the full hardware schematics for the Synapse-191 computer. Each schematic corresponds to a specific module described in Chapter Hardware Implementation of this report, including the Control Unit,…

1 min read

References

References

References

References

Wikipedia, Brainfuck , https://en.wikipedia.org/wiki/Brainfuck

2 min read